RFIC\Analog System Analysis student

The candidate will be part of a RFIC circuit design group developing state of the art 4G LTE transceivers. The candidate will be responsible for transceiver working configurations through Optimization, Calibrations and Analysis of analog impairments towards optimized system performance. Candidate will also be responsible for the RFIC\analog system bring-up and performing low level and system level performance tests. In addition candidate will be involved in developing internal characterization tools. The candidate should have motivation and desire to work, work ethic, creativity and must be a team player.